Brief Biography

Emmanuel Adeagbo was raised in Los Angeles, California and graduated with a B.S. in Electrical Engineering and Computer Science from the University of California, Berkeley in 2009. Since 2009, he has been pursuing his Ph.D. in Electrical and Computer Engineering at the University of California, Davis and currently works at the VLSI Computation Laboratory.

In his research group, he has developed tools for routing inter-processor communication links, worked on regular expression processing for string based applications, and designed the digital oscillator for the group’s next generation of many-core processor arrays. His research interests include regular expression applications, VLSI, and digital architecture design.

Mr. Adeagbo held a summer internship at Cisco systems in 2007 where he wrote debugging modules for data packet analyzers. In 2013 he interned at Intel under the Platform Engineering Group (Exascale Computing) in Hillsboro, OR where he developed a predictive SRAM memory model suited for Register Files, ROMS and other types of memory topologies as part of the memory architecture for exascale hardware clusters.

In 2008, Mr. Adeagbo was the recipient of the Intel undergraduate research scholarship for his work on SRAM variations and robustness under the guidance of Professor Borivoje Nikolic at the Berkeley Wireless Research Center. He is also the recipient of the ECEGP Fellowship and the ECE TA Program Support Fellowship for multiple years since 2009.

This page was last modified on 6/25/2015.