2006 Workshop on On- and Off-Chip Interconnection Networks for Multicore Systems

6-7 December 2006, Stanford, California

Main

Program

Posters

Organizers

Registration

Venue & Hotel Reservations

Logistics

For Instructors

Support

Contact

Purpose

The goal of this workshop is to identify a research agenda to provide the interconnections needed to support computing in the coming multi-core and SoC era. At this workshop, we will focus on this topic through a combination of invited talks, panel discussions, and working groups with select participants from industry and academia.

The workshop schedule includes (1) invited presentations from prominent researchers on both design constraints (applications and technology) and the state-of-the-art in on-chip interconnection network (OCIN) design; (2) panel discussions on open questions and research topics on OCINs; (3) optional contributed poster sessions to present and discuss current research in this area; and (4) expanded breaks allowing extensive discussion of topics introduced in the presentations and the panels.

The agenda, and abstracts/slides/video from the speakers/panels/working groups, are posted on the program page.

Final report from the workshop: [ pdf, doc ]